ENHANCED SEPIC CONVERTER REDUCES CURRENT STRESS ON SWITCHING DEVICES AND DIODES WHILE MAINTAINING HIGH EFFICIENCY

Abstract

This article presents an innovative DC buck-boost converter design that mitigates the excessive switching current stress inherent in SEPIC converters. The study highlights a significant reduction in current strain on switching devices and diodes during transitions. A thorough steady-state analysis has been conducted, encompassing voltage conversion ratios, power dissipation, and voltage stress on key switching components. Simulation and theoretical evaluations in buck and boost modes demonstrate that the proposed converter achieves exceptionally low source current overshoot across switches S1, S2, D1, and D2, even when the conversion ratio varies from 0.2 to 2. Compared to SEPIC and other analyzed topologies, this converter delivers superior efficiency with substantially lower power losses. Furthermore, experimental validation, considering the impact of parasitic resistances, confirms that this design outperforms existing solutions by maximizing efficiency, enhancing reliability, minimizing energy dissipation, and extending operational lifespan, making it an optimal choice for power electronics applications. Moreover, experiments with nonlinear load currents were conducted further to validate the superior performance of the proposed converter.