A DESIGN OF LOW NOISE 10-BIT ENOB 57.9dB SNDR SAR ADC USING MODULATION COMPARATOR

Abstract

This article presents a design of low noise 10-bit Effective Number of Bits (ENoB) 57.9dB Signal-to-noise and distortion ratio (SNDR) Successive
approximation-register (SAR) Analog-to-digital converter (ADC) using modulation comparator, suitable for modern biomedical applications. In this design, a
Two-stage Op-amp Modulation (TOM) has been applied, which consists of a two-stage op-amp combined with two synchronized polarity-reversing choppers.
Although 1/f noise and mismatch effect have been significantly reduced by using two-stage op-amp with modulation technique, there are still some limitations.
In particular, modulation technique is imperfect, combined with offsets caused during the manufacturing process, will cause output ripple leading to low output
signal quality. To overcome this, a compensation technique using two-stage Double Cross Integrator Amplifier (DCIA) are applied in the proposed ADC to optimize
comparator performance, minimize offset and noise. Using 180nm CMOS technology, the proposed SAR ADC needs a 0.55mm2
active area. With a power of
2.135mW and a Figure-of-Merits (FoMs) of 0.37 pJ/step.conv. In addition, the proposed SAR ADC achieves a Signal-to-noise ratio (SNR) of 56.40dB, a SNDR of
57.9dB, and a Signal-to-noise ratio and distortion (SINAD) of 56.40dB. Furthermore, this work attains an ENoB of 9.08-bit.